Recently, a resistance variable memory which uses a variable resistance element as a storage element is focused as a next-generation nonvolatile memory alternative to flash memory. The resistance variable memory does not need a transistor to store data in a storage layer and can form a memory cell including the storage layer at a crossing area of a bit line and a word line, and therefore it is easy to be miniaturized. Therefore, it is being considered that the bit line and the word line are three-dimensionally laminated to improve an integration degree.
In the case where the bit line and the word line are three-dimensionally arranged, it is necessary to secure a wiring area for connecting the bit line and the word line on a semiconductor substrate. When the bit line and the word line are separately connected on a semiconductor substrate, a ratio of the wiring area with respect to a memory cell area is increased, and an integration degree cannot be increased. Therefore, a method is considered in which at least one of the bit line and the word line is connected to a semiconductor substrate via a common contact plug to decrease the wiring area.
However, for example, when laminated multiple word lines are connected to the common contact plug and when an off-leak current flows to a non-selected word line connected to a memory cell not to be written, the current also flows to the contact plug. Therefore, a voltage of a selected word line connected to a memory cell to be written might fluctuate due to the off-leak current.